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Table 2 Comparison of design results between SF-ROM and MF-ROM (after 200 iterations)

From: Stress-constrained topology optimization using approximate reanalysis with on-the-fly reduced order modeling

Method

\(\varvec{N_{b}}\)

\(\varvec{\hat{e}_{rb}}\)

Calls to ROM

CPU running time \(\varvec{(/s)}\)

Optimal compliance \(\varvec{(c^{*})}\)

Relative error of \(\varvec{c^{*}(\%)}\)

Reference

0/200

1884.26

291.48

SF-ROM

4

0.1

135/200

1624.22

292.3

0.28

  

0.5

164/200

1355.04

301.5

3.44

MF-ROM

4

0.1

129/200

1541.80

294.19

0.93

  

0.5

164/200

1296.32

300.11

2.96